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Modern applications increasingly require the computation of DSP workloads comprised of a variety of numerically-intensive DSP tasks. These workloads are found in communication, multime-dia, embedded, and wireless applications, and often require very high levels of computation and high energy efficiency. The Asynchronous Array of Simple Processors (AsAP)(More)
This paper presents the architecture of an asynchronous array of simple processors (AsAP), and evaluates its key architectural features as well as its performance and energy efficiency. The AsAP processor calculates DSP applications with high energy-efficiency, is capable of high-performance, is easily scalable, and is well-suited to future fabrication(More)
An Arithmetic Logic Unit (ALU) and a Multiply-Accumulate (MAC) unit designed for a high performance digital signal processor are presented. The 16-bit ALU performs all the logic instructions and includes a saturating adder and subtractor. It also performs shift instructions and a bit reverse instruction. The MAC unit is pipelined into three stages and(More)
Two methods for partial vectorization are implemented in the state-of-the-art optimizing open-source Open64 compiler. The first method vectorizes isomorphic expression trees in a basic block using tree matching. Given that finding isomorphic trees in a basic block is fast, the compile time overhead for this approach is negligible. The second method computes(More)
High performance and energy-efficient computation, including algorithm enhancements, application mapping/software development on many-core architectures, and VLSI design of ASICs and reconfigurable architectures that support networking and communications, signal processing, error correction, and biomedical applications. Single-chip solutions targeted for(More)
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