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Multi-functional floating-point MAF designs with dot product support
TLDR
This paper presents multi-functional double-Precision and quadruple-precision floating-point multiply-add fused (FPMAF) designs. Expand
A single/double precision floating-point reciprocal unit design for multimedia applications
TLDR
This paper introduces a packed floating point reciprocal unit that can perform reciprocal of either a double precision or two parallel single-precision floating-point numbers using fast multipliers. Expand
A SINGLE/DOUBLE PRECISION FLOATING-POINT MULTIPLIER DESIGN FOR MULTIMEDIA APPLICATIONS
TLDR
This paper introduces a novel floating point multiplier that can perform either a double precision or two parallel single-precision floating-point multiplications. Expand
Design and evaluation of schemes for computing sum of squares in fixed point
TLDR
Several schemes for computing the sum of squares for fixed point numbers are designed, synthesized, and evaluated in this study. Expand
Evaluation of Sticky-Bit Generation Methods for Floating-Point Multipliers
TLDR
This paper presents a comparison of previous fast sticky-bit generation designs and proposes a novel design that is independent from the multiplier’s hardware and can be used in any floating-point multiplier. Expand