Mely Chen Chi

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Three Dimensional Integrated Circuits (3D ICs) are designed to have better performance and yield. Devices of a circuit are placed on different layers. Through-Silicon Vias (TSV) is used to connect a signal that crosses adjacent layers. In this paper we propose an algorithm to partition an integrated circuit with the objective to minimize the number of TSV(More)
This work presents a single-channel analog processor IC for the wireless biosignal monitor. This chip occupies a small die area of 0.52 mm2 and has a low power consumption of 0.75 mW at a 5-V supply voltage. The wired and wireless systems constructed by using the designed processor chip and commercial discrete ICs have been validated in this study.(More)
We present a construction-by-correction approach to solve the obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction problem. We build an obstacle-weighted spanning tree as a guidance to construct OARSMT on an escape graph. We use Dijkstra's algorithm for routing. A refinement of U- shaped removal is applied during the routing process to(More)
We proposed an effective voltage scaling technique to assign the supply voltage to gates in the circuit of dual power supplies. The algorithm is composed of a greedy voltage assignment phase and an iterative voltage re-assignment refinement phase. It reduces the total power without performance degradation. We apply the algorithm to several test cases. It(More)