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Three-dimensional (3D) integrated circuits (ICs), which contain multiple layers of active devices, have the potential to dramatically enhance chip performance, functionality, and device packing density. They also provide for microchip architecture and may facilitate the integration of heterogeneous materials, devices, and signals. However, before these(More)
This paper reviews progress and current critical issues with respect to the integration of germanium (Ge) surface-channel MOSFET devices as well as strained-Ge buried-channel MOSFET structures. The device design and scalability of strained-Ge buried-channel MOSFETs are discussed on the basis of our recent results. CMOS-compatible integration approaches of(More)
We describe a newly developed parallel three-dimensional semiconductor device simulator. The program utilizes the message passing architecture and has been developed on a network of workstations. Two iterative algorithms to solve the nonlinear semiconductor device equations are presented. The algorithms are tested by simulating a three-dimensional MOSFET(More)
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