We have developed a foveated imager chip with high resolution photo-cells (referred to as static pixels) in the center that are surrounded by more space consuming adaptive change detection pixels (referred to as dynamic pixels). Inspired by the neurons of biological nervous systems, they emit short voltage pulses, the static pixels with a frequency… (More)
In this paper we present a 2 input analog Current-Starved Pseudo-Floating Gate (CSPFG) inverter with capacitive feedback. The analog CSPFG inverter suppresses low frequencies due to the active, local feedback. This inverter can be used in designing filters where a narrow band pass or reject is the main goal. Typical applications are detection of high… (More)
In this paper we present a tunable Auto-Zeroing Amplifier(AZA). The amplifier is based on Pseudo Floating gate and in addition to gain, it offers frequency band adjustment. Both the low-and high-frequency cutoffs are controlled electronically using bias voltages, thus the amplifier can be used in design of various time continues filters. The peak gain of… (More)
In this paper we propose a simple and compact way to realize a bi-directional interface to drive resonant sensors. The bi-directional interface can be set to both activate the resonating sensor (activation mode) and to read its response (read-out mode). During the normal operation of the system these two modes are activated alternatively, depend on the… (More)
In this paper we propose a differential dynamic dual rail CMOS logic style for ultra-low-voltage and high-speed operation. For a supply voltage equal to 300mV using a 90nm TSMC CMOS process the speed of the proposed logic style is more than 25 times faster than traditional dual rail clocked voltage switch logic CVSL.