Md. Mizanur Rahman Khan

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Smaller feature size, higher clock frequency and lower power consumption are of core concerns of today’s nano-technology, which has been resulted by continuous downscaling of CMOS technologies. The resultant ‘device shrinking’ reduces the soft error tolerance of the VLSI circuits, as very little energy is needed to change their states. Safety critical(More)
Soft errors are significant concern for circuit reliability. Among various adopted techniques to mitigate soft errors effects on system functionality, Error Correcting Code (ECC) is one of the dominant approaches since it reduces cost overhead significantly. This paper deals with a new error correcting coding approach to tolerate soft errors at processor,(More)
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