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Approximate Consensus in Highly Dynamic Networks: The Role of Averaging Algorithms
TLDR
We investigate the approximate consensus problem in highly dynamic networks in which topology may change continually and unpredictably. Expand
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Approximate Consensus in Highly Dynamic Networks
TLDR
In this paper, we investigate the approximate consensus problem in highly dynamic networks in which topology may change continually and unpredictably. Expand
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Diffusive clock synchronization in highly dynamic networks
TLDR
We show that diffusive algorithms are able to solve clock synchronization if, at every instant, the network is rooted, i.e., contains a directed spanning tree. Expand
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Safely Stimulating the Clock Synchronization Algorithm in Time-Triggered Systems–A Combined Formal and Experimental Approach
TLDR
Deterministic replay of the communication at the data link layer can be used to stimulate clock synchronization mechanisms of time-triggered systems such as TTP/C. Expand
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Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip
TLDR
This paper introduces a simple fault-tolerant tick generation algorithm based on Srikanth & Toueg's consistent broadcast primitive that can be directly implemented in VLSI using asynchronous digital logic. Expand
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Reconciling fault-tolerant distributed computing and systems-on-chip
TLDR
In this paper, we introduce a modeling and analysis framework based on continuous computations and zero-bit message channels, and employ this framework for the correctness & performance analysis of a distributed fault-tolerant clocking approach for Systems-on-Chip (SoCs). Expand
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Runtime verification of embedded real-time systems
TLDR
We present a runtime verification framework that allows on-line monitoring of past-time Metric Temporal Logic (ptMTL) specifications in a discrete time setting. Expand
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Real-Time Runtime Verification on Chip
TLDR
We present an algorithmic framework that allows on-line monitoring of past-time MTL specifications in a discrete time setting. Expand
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Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation - [Extended Abstract]
TLDR
This paper is devoted to the design and the correctness proof of a novel Byzantine fault-tolerant self-stabilizing pulse synchronization protocol, which facilitates a direct implementation in standard asynchronous digital logic. Expand
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Transience Bounds for Distributed Algorithms
TLDR
A large variety of distributed systems, like some classical synchronizers, routers, or schedulers, have been shown to have a periodic behavior after an initial transient phase (Malka and Rajsbaum 1991). Expand
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