Matthias Dörfel

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A new approach for the translation of SDL specifications to a mixed hardware/software system is presented. Based on the computational model of communicating extended finite state machines (EFSM) the control flow is separated from data flow of the SDL process. Hence for the first time it is possible to generate a mixed hard-ware/software implementation of an(More)
This paper presents a prototyping platform for high performance communication systems together with a design methodology. Based on a formal design entry and non-functional design goals such as execution time and overall system cost, a software/hardware partitioning is generated and its performance is estimated with formal models. Valid partitionings are(More)
A known problem in the area of hardware/software codesign is the selection of the proper interface between the different parts of the design. This paper presents a technique which eases the selection by combining different synthesis techniques together with rapid prototyping. Application field of the technique is the design of communication systems where C(More)
Based on the methodology for the development of communication systems, a framework for early performance evaluation and hardware/software codesign of such systems is presented. We describe how performance requirements can be formulated in a formal way during the analysis phase of a project and how these requirements are used by the synthesis tools for(More)
Requirements on end-to-end response times are essential for the correct behavior of complex cyber-physical systems. To ensure such requirements not only the start and end points like sensors and actuators are important but all functions and systems in between. For such requirements an adequate model is necessary to describe the flow of information involved(More)
An essential characteristic of embedded systems is real-time, but the commonly used specification techniques do not consider temporal aspects in general like fulfilment of high level timing requirements or dynamic reactions on timing violations. We show a new formal time model that fills this gap: Timing requirements specify the timing behaviour of(More)