Matthew D. Nguyen

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This paper describes a methodology for hardware/software formal co-verification. In the proposed methodology, a unified computational model is constructed for a hardware/software system under verification, in which the software and the hardware are tightly connected. In addition, we proposed a systematic method to formulate properties for the system using(More)
For TREC-4, we enhanced our existing prototype that implements relevance ranking using the AT&T DBC-1012 Model 4 parallel database machine to support the entire document collection. Additionally, we developed a special purpose IR prototype to test a new index compression algorithm and to provide performance comparisons to the relational approach. We(More)
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