Mathieu Thevenin

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— As application complexity increases, the design of efficient computing architectures able to cope with embedded constraints requires a fine algorithm analysis. This paper proposes an original approach based on Modular Assembly Simulator (MAsS) tool that allows Design Space Exploration (DSE) for programmable processors. The originality of the method(More)
Coarse-Grained Reconfigurable Architectures (CGRAs) are promising high-performance and power-efficient platforms. However, their uses are still limited by the capability of mapping tools. This abstract paper outlines a new automated design flow to map applications on CGRAs. The interest of our method is shown through comparison with state of the art(More)
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