Masoud Oveis Gharan

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In this paper, a new approach for implementing virtual channels (VC) for multi-core interconnection networks is presented. In this approach, the flits of different packets interleave in a channel with a single buffer of nominal depth by using a rotating flit-by-flit arbitration. The routing path of each flit is guaranteed because the flits belonging to the(More)
Scalable on-chip communication system such as Network-on-Chip (NoC) is needed to meet the communication demand of large number of SoC (System on Chip) cores. In the NoC router micro-architecture design, arbiter has become increasingly important due to its significant impact on the performance and efficiency of NoC systems. In this paper, we propose an(More)
A growing number of processing cores on a chip require an efficient and scalable communication structure such as network on chip (NoC). The channel buffer organization of NoC uses virtual channels (VCs) to improve data flow and performance of the NoC system. Dynamically allocated multiqueues (DAMQs) are an effective mechanism to achieve VC flow control with(More)
Network on Chip (NoC) is a new paradigm that can solve the problems related to System on Chip (SoC) design. These problems and challenges become more significant when the complexity of SoC increases. The vast volume of these challenges requires a new and flexible NoC test framework (simulator) to be investigated. We have developed a general purpose SystemC(More)
Dynamically Allocated Multi Queue (DAMQ) is employed to design Virtual Channel (VC) structure for efficient NoC communication. However, DAMQ has some drawbacks related to higher latency and lower throughput. We present a new VC organization methodology to improve DAMQ-based technique. The micro-architecture of a fast DAMQ input-port is presented in this(More)
With the growing number of on-chip cores in multicore systems, there is an urgent need of efficient communication structures. NoC (Network-on-Chip) plays an important role in determining the performance of on-chip communication for multicore systems. Specifically, packet-based wormhole communication is known as the most viable solution for an MPSoC(More)
The escalating numbers of on-chip processing cores necessitate the introduction of a high performance and scalable communication backbone. In respond to this, Network on Chip (NoC) systems are introduced to play an important role in determining the performance and power of the entire chip. Specifically, Packet-based NoC is known as the most viable(More)
Network-on-Chip (NoC) has emerged as one of the main communication structure suitable for the interconnection of processing and other IP cores of a system-on-chip (SoC). An NoC typically utilizes virtual channels (VCs) to improve wormhole routing among the SoC cores by enabling multiple data packets to share a communication channel and to avoid deadlocks.(More)