Masayuki Ikebe

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A compact complementary metal-oxide semiconductor (CMOS) circuit for depressing synapses is designed for demonstrating applications of spiking neural networks for contrast-invariant pattern classification and synchrony detection. Although the unit circuit consists of only five minimum-sized transistors, they emulate fundamental properties of depressing(More)
We will describe a cellular-automaton (CA) LSI architecture that extracts quadrilateral objects, such as box areas filled with the same pixel values, from binary images. We propose a serial combination of parallel CA algorithms, based on the reaction–diffusion (RD) chemical systems model. Each cell in the CA is implemented by a simple digital circuit called(More)
—This paper presents a novel hardware-oriented stereo vision system based on 1-D cost aggregation. Many researchers have implemented hardware efficient stereo matching to realize real-time systems. However, such methods require a large amount of memory. We proposed a system that is based on a hardware-software hybrid architecture for memory reduction. It(More)