Masato Yoshioka

Learn More
This 10-b 50-MSamples/s SAR analog-to-digital converter (ADC) features on-chip digital calibration techniques, comparator offset cancellation, a capacitor digital-to-analog converter (CDAC) linearity calibration, and internal clock control to compensate for PVT variations. A split-CDAC reduces the exponential increase in the number of unit capacitors needed(More)
As the variations of shrunk processes increasing at rapid rate, the performances of analog/mixed-signal chips remarkably fluctuate. It is necessary to take the yield as a design objective in design optimization. This paper presents a novel method to generate yield-embedded Pareto-front to simultaneously optimize both the yield and performances. Unlike the(More)
This paper presents a new method using multi-objective optimization algorithm to automatically find the <i>best solution</i> from a <i>topology library</i> of analog circuits. Firstly this method abstracts the Pareto-front of each topology in the library by SPICE simulation. Then, the Pareto-front of the <i>topology library</i> is abstracted from the(More)
A 51-year-old female had been diagnosed with a hemangioma in the hepatic segment 6 (S6). After a 6-year follow-up, enlargement of the tumor was detected. The tumor was clearly enhanced in the arterial phase, and the enhancement remained in the portal phase on computed tomography (CT). Although the primary differential diagnosis on CT was hepatocellular(More)
Positron emission tomography with 2-deoxy-2-[(18)F]fluoro-D-glucose (FDG-PET) has been proven useful for differentiating pancreatic ductal cancer from mass-forming chronic pancreatitis. However, there are particular pancreatic tumors having various grades of malignancy such as intraductal papillary mucinous neoplasm (IPMN) or pancreatic neuroendocrine(More)
  • 1