Masato Osawa

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A sub- μW ECG acquisition IC is presented for a single-chamber leadless pacemaker applications. It integrates a low-power, wide dynamic-range ECG readout front end together with an analog QRS-complex extractor. To save ASIC power, a current-multiplexed channel buffer is introduced to drive a 7 b-to-10 b self-synchronized SAR ADC which utilizes 4 fF/unit(More)
A low-power analog signal processing IC is presented for the low-power heart rhythm analysis. The ASIC features 3 identical, but independent intra-ECG readout channels each equipping an analog QRS feature extractor for low-power consumption and fast diagnosis of the fatal case. A 16-level digitized sine-wave synthesizer together with a synchronous readout(More)
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