— A zero-skew routing algorithm with clustering and improvement methods is proposed. This algorithm generates a zero-skew routing in O(n log n) time for n pins, and it is proven that the order of the total wire length is best possible. Our algorithm achieves 20% reduction of the total wire length on benchmark data compared with the best known algorithm .
—Graphics processing units (GPUs) provide an order-of-magnitude improvement on peak performance and performance-per-watt as compared to traditional multicore CPUs. However, GPU-accelerated systems currently lack a generalized method of power and performance prediction, which prevents system designers from an ultimate goal of dynamic power and performance… (More)
Delay minimization methods are proposed for zero-skew routings. A delay-time estimation formula is derived, which can be used as an objective function to be minimized in zero-skew routing algorithms. Moreover, the optimum wire width is formulated. Experimental results show that our methods with a clustering-based algorithm achieve 50% reduction of the delay… (More)
The point-location problem is stated as follows: Given a subdivision of the plane by a straight line planer graph G with n vertices and an arbitrary query point Q, determine which region of the subdivision contains Q. A new practical point-location algorithm is proposed. It has 0(1) search time, O(n) space, and O(n) preprocessing time in the average case.… (More)
| A bucket algorithm is proposed for zero-skew routing with linear time complexity on the average. Our algorithm is much simpler and more ecient than the best known algorithm which uses Delauna y triangulations for segments on Manhattan distance. Experimen tal results show that the linearit y of our algorithm is accomplished. Our algorithm generates a… (More)
– Reliability of embedded systems can be enhanced by multicore and partitioning approaches. Physical partitioning based on AMP multicore achieves runtime stability of multiple applications in a system and prevents the whole system shutdown as well even when a malicious code creeps in. Combined with logical partitioning by processor virtualization and SMP… (More)
We propose a new processor virtualization architecture, VIRTUS, to provide a dedicated domain for pre-installed applications and virtualized domains for downloaded native applications. With it, security-oriented next-generation mobile terminals can provide any number of domains for native applications. VIRTUS features three new technologies: VMM… (More)
Fundamental algorithms should be parallelized to accelerate EDA software on multi-core architecture. In this paper, we introduce <i>scalable algorithms</i> that have scalability on multi-cores. As an example, a sorting algorithm, called <i>Map Sort</i>, is presented. This algorithm uses a <i>map</i> from subsets of input data to intervals on data range.… (More)