Masamichi Ishii

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This paper describes the architecture (circuit design) and principles of operation of sigma-delta (ΣΔ) time-todigital converters (TDC) for high-speed I/O interface circuit test applications; they offer good accuracy with short test times. In particular, we describe multi-bit ΣΔ TDC architectures for fast testing. However, mismatches among delay cells in(More)
This paper describes the architecture and principles of operation of sigma-delta ( ) time-to-digital converters (TDC) for high-speed I/O interface circuit test applications. In particular, we describe multi-bit TDC architectures; they offer good accuracy with short testing time. However, mismatches among delay cells in delay lines degrade their linearity.(More)
In the next generation model based robot systems, absolute positioning accuracy of a robot is becoming more important to effectively utilize advanced offline teaching and online programming techniques. This paper describes a calibration procedure for a hand-eye system with a multijoint direct-drive manipulator and a 3-D visual sensor system. A new technique(More)
This paper describes the architecture and principles of operation of sigma-delta (Σ∆) time-to-digital converters (TDC) for high-speed I/O interface circuit test applications; they offer good accuracy with short test times. In particular, we describe a multi-bit Σ∆ TDC architecture for fast testing. However, mismatches among delay cells in delay lines(More)
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