Masamichi Ishii

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— This paper describes the architecture (circuit design) and principles of operation of sigma-delta (ΣΔ) time-to-digital converters (TDC) for high-speed I/O interface circuit test applications; they offer good accuracy with short test times. In particular, we describe multi-bit ΣΔ TDC architectures for fast testing. However, mismatches among delay cells in(More)
The National Institute of Science and Technology Policy of the Japanese government conducted a survey about public attitudes towards and understanding of science and technology in February to March of 2001. The purpose of this survey was to collect data on the level of public understanding of science and technology and to search for measures to improve the(More)
— This paper describes the architecture and principles of operation of sigma-delta (Σ∆) time-to-digital converters (TDC) for high-speed I/O interface circuit test applications; they offer good accuracy with short test times. In particular, we describe a multi-bit Σ∆ TDC architecture for fast testing. However, mismatches among delay cells in delay lines(More)
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