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As technology reaches nanoscale order, interconnection systems account for the largest part of power consumption in Systems-onChip. Hence, an early and sufficiently accurate power estimation technique is needed for making the right design decisions. In this paper we present a method for system-level power estimation of interconnection fabrics in(More)
With the progress of deep submicron technology power consumption and temperature related issues have become dominant factors for chip design. Therefore, very large-scale integrated systems like Systems-on-Chip (SoCs) are exposed to an increasing thermal stress. On the one hand, this necessitates effective mechanisms for thermal management. On the other(More)
In large wireless sensor networks, randomly deployed nodes have to organize themselves as energy efficient as possible to avoid redundant sensor and transceiver operations. In addition to its energy awareness, the network has to guarantee complete functionality as long as possible. This paper presents an enhanced version of the clustering algorithm(More)
With a fast rising productivity and even faster rising integration densities, i.e., designproductivity-gap, energy and power dissipation are critical topics in high level system design more than ever. Thermal aware system design, reliable power delivery, and the overall energy dissipation are only few crucial design properties. In this work we present a(More)
Temperature management and signal integrity are two highly relevant challenges for nano scale CMOS devices. As temperature of integrated circuits affects the frequency of defect mechanisms’ occurrence and consequently influences reliability, temperature monitoring is inevitable. To provide the necessary thermal sensors, different techniques are available.(More)
Signal integrity and packet data protection against soft errors represent highly relevant challenges for Networks-on-Chip regarding the shrinking of process technology. Therefore, data protection and error recovery strategies at the End-to-End level are the most convenient solutions considering overall implementation costs and performance penalties.(More)
With the progress of deep submicron technology power consumption and temperature related issues have become two of the most critical aspects for chip design. Therefore, very large-scale integrated systems like Systems-on-Chip (SoCs) are exposed to an ever increasing thermal stress. This necessitates effective mechanisms for thermal management. In this paper(More)
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