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Software transactional memory for dynamic-sized data structures
TLDR
A new form of software transactional memory designed to support dynamic-sized data structures, and a novel non-blocking implementation of this STM that uses modular contention managers to ensure progress in practice.
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A flexible framework for implementing software transactional memory
TLDR
DSTM2, a Java™ software library that provides a flexible framework for implementing object-based software transactional memory (STM), is described, providing a substantial improvement over the awkward programming interface of the previous DSTM library.
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Hybrid transactional memory
TLDR
Using a simulated multiprocessor with HTM support, the viability of the HyTM approach is demonstrated: it can provide performance and scalability approaching that of an unbounded HTM implementation, without the need to support all transactions with complicatedHTM support.
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Obstruction-free synchronization: double-ended queues as an example
We introduce obstruction-freedom, a new nonblocking property for shared data structure implementations. This property is strong enough to avoid the problems associated with locks, but it is weaker…
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Early experience with a commercial hardware transactional memory implementation
TLDR
The experience includes a number of promising results using HTM to improve performance in a variety of contexts, and also identifies some ways in which the feature could be improved to make it even better.
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Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
TLDR
A family of hybrid TMs built using the recent NOrec STM algorithm is introduced that, unlike existing hybrid approaches, provide both low overhead on hardware transactions and concurrent execution of hardware and software transactions.
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Wait-Free Algorithms for Fast, Long-Lived Renaming
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A Lazy Concurrent List-Based Set Algorithm
We present a novel “lazy” list-based implementation of a concurrent set object. It is based on an optimistic locking scheme for inserts and removes and includes a simple wait-free membership test.…
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Towards formally specifying and verifying transactional memory
TLDR
TMS1 (Transactional Memory Specification 1), a precise specification of correct behaviour of a TM runtime library, is presented and a simulation proof that TMS2 implements TMS1 is presented, thus showing that to prove that an implementation satisfies T MS1, it suffices to proved that it satisfies TMS 2.
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SNZI: scalable NonZero indicators
We introduce the SNZI shared object, which is related to traditional shared counters, but has weaker semantics. We also introduce a resettable version of SNZI called SNZI-R. We present…
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