Mark D. Matson

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This paper presents a method for modeling MOS combinational logic gates. Analyses are given for power consumption, output response delay, output response waveshape, and input capacitance. The models are both computationally efficient and accurate, typically lying within 5% of SPICE estimates. They are pertinent to simulation and optimization applications. A(More)
This project is devoted to the study of fundamental techniques used in the development of both algorithms and representations for the conversion of functional specifications to custom integrated circuit layout specifications. Included in this area are five major areas of investigation. These are the development of functional specification languages, the(More)
The goal of this project is the development of CAD techniques for the design of high-performance custom integrated circuits. Both architectural performance (parallelism) and circuit performance (speed and power dissipation) are considered, and a major theme is to coordinate these two aspects of performance in an optimal way. In order to achieve these goals,(More)
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