Mario Nemirovsky

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Page-based virtual memory improves programmer productivity, security, and memory utilization, but incurs performance overheads due to costly page table walks after TLB misses. This overhead can reach 50% for modern workloads that access increasingly vast memory with stagnating TLB sizes. To reduce the overhead of virtual memory, this paper proposes(More)
This paper examines some of the most promising and challenging scenarios in IoT, and shows why current compute and storage models confined to data centers will not be able to meet the requirements of many of the applications foreseen for those scenarios. Our analysis is particularly centered on three interrelated requirements: 1) mobility; 2) reliable(More)
Multistreamed processors can significantly improve processor throughput by allowing interleaved execution of instructions from multiple instruction streams. In this paper, we present an analytical modeling technique to evaluate the effect of dynamically interleaving additional instruction streams within superscalar architectures. Using this technique,(More)
Current trends in microprocessor architecture design are leading towards a dramatic increase of core-level parallelization, wherein a given number of independent processors or cores are interconnected. Since the main bottleneck is foreseen to migrate from computation to communication, efficient and scalable means of inter-core communication are crucial for(More)
The introduction of massively multithreaded (MMT) processors, comprised of a large number of cores with many shared resources, has made task scheduling, in particular task to hardware thread assignment, one of the most promising ways to improve system performance. However, finding an optimal task assignment for a workload running on MMT processors is an(More)
This paper introduces a new packet processor designed for stateful networking applications: those applications where there is a requirement to support a large amount of state with little locality of access. Stateful applications require a high rate of external memory accesses, and this in turn implies a high degree of parallelism is needed. Our packet(More)
The explosive and robust growth of the Internet owes a lot to the "end-to-end principle", which pushes stateful operations to the end-points. The Internet grew both in traffic volume, and in the richness of the applications it supports. The growth also brought along new security issues and network monitoring applications. Edge devices, in particular, tend(More)
In order to gain insight into the earliest pathological changes underlying the development of autoimmune aspermatogenic orchitis (AIAO) the blood-testis barrier was studied by light and electron microscopy, freeze-etching, and cytochemical techniques early (from 1 to 8 days after adjuvant treatment of isoimmunization). At later times (16 to 21 days) the(More)
Networks-on-chip (NoCs) are emerging as the way to interconnect the processing cores and the memory within a chip multiprocessor. As recent years have seen a significant increase in the number of cores per chip, it is crucial to guarantee the scalability of NoCs in order to avoid communication to become the next performance bottleneck in multicore(More)