Mario Dufresne

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This paper describes the functional verification effort during a specific hardware development program that included three of the largest ASICs designed at Nortel. These devices marked a transition point in methodology as verification took front and centre on the critical path of the ASIC schedule. Both the simulation and emulation strategies are presented.(More)
achieve the necessary simulation efficiency. The results from a project on which the methodology was used are presented. The process provided early visibility of over 200 issues in the system of which 32 were critical to the successful conformance and timely completion of the project. This paper describes a functional design and verification process for new(More)
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