Marco Antonio Gurrola-Navarro

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The Floating Gate MOS Transistor with Multiple Inputs is a device that offers some advantages with regard to the conventional MOS transistor. However, even today, there is a lack of formal and detailed analysis about the analog model in the literature. An accurate model of this device is very important for designing high performance analog cells. In this(More)
A technique for the implementation of a programmable grounded and floating resistors is presented. The grounded version of the resistor has been implemented in a standard CMOS technology, where a set of digital inputs allows the programming of the circuit. The performance of the circuit is shown by means of DC, AC, Transient and Monte Carlo simulations.(More)
This paper presents a technique for improving the response of amplifier implemented with multiple inputs floating gate transistor for processing input signals of very small amplitude. With the technique presented here, it is possible to improve the transconductance of the amplifier, maintaining all the positive features of the device as variable threshold(More)
The extraction of the floating gate voltage on the Multiple-Input Floating-Gate Transistor is discussed in order to understand their behavior in a better way. The lack of linearity at very low voltage is discussed. The presence of a residual charge on the floating gate is experimentally shown despite the use of metal contact to discharge it. This analysis(More)
This is an analysis of a common source CMOS transconductor based on a Multiple-input Floating Gate MOS transistor with feedback configuration. This analysis allows to visualize the specific way to find the operating point of the amplifier, when it is used as a transconductor. In this work, both theoretical and experimental results are presented. Here, the(More)
A system for on-die automatic impedance matching in current mode offchip signaling is described. In order to perform the automatic matching operation, an algorithm that integrates the sign of the impedance matching error and the sign of the coupling branch current is implemented. An advantage of the proposed system is that it works without interfering with(More)
A modification of the standard cell methodology to obtain area reduction in synthesized digital system layouts is presented. The proposed modifications consist in the full-custom redesign of the standard cell library and the application of a compaction algorithm in the step of cell placement. The effectiveness of the methodology has been shown compacting(More)
This paper presents a parametrized VLSI architecture for an nstate Kalman filter implementation intended for real-time applications that typically require a sensing rate not far from 300 samples per second. The architecture has been optimized in silicon area and power consumption. This approach has been proved with a fabricated chip using a 0.5 μm CMOS(More)
A MATLAB method is introduced for biasing CMOS analog cells operating in weak inversion region and based on the Multiple-Input Floating Gate MOS Transistor. Despite SPICE language is a widely accepted tool to design CMOS analog cells, it has some problems to simulate circuits based on the Multiple-Input Floating Gate Transistor since floating nodes appear(More)