Marco Alexandre Cravo Gomes

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This paper proposes an efficient HDL library of processing units for generic and DVB-S2 LDPC decoders following a modular and automatic design approach. General purpose, low complexity and high throughput bit node and check node functional models are developed. Both full serial and parallel architecture versions are considered. Also, a dedicated functional(More)
Low-Density Parity-Check (LDPC) codes are among the best error correcting codes known and have been adopted by data transmission standards, such as DVB-S2 or WiMax. They are based on binary sparse parity check matrices and usually represented by Tanner graphs. LDPC decoders require very intensive message-passing algorithms, also known as belief propagation.(More)
Magnitude Modulation is a technique proposed with success for QPSK and OQPSK in order to maximize power and bandwidth of small satellite earth stations, by reducing PAPR of the modulated signal at the HPA input. To meet the ever growing demand for higher data rates, higher order modulations have been considered. This paper shows that it is possible to use(More)
This paper addresses the problem of controlling the envelope's power peak of single carrier modulated signals, band limited by root-raised cosine (RRC) pulse shaping filters, in order to reduce power amplifier back-off for very small aperture terminals ground stations. Magnitude modulation (MM) is presented as a very efficient solution to the(More)
Semi-parallel architectures for decoding Digital Video Broadcasting-Satellite 2 (DVB-S2) Low-Density Parity-Check (LDPC) codes have improved Very Large Scale Integration (VLSI) solutions, but their design is challenging from several perspectives. In order to conveniently exploit parallelism for obtaining VLSI LDPC decoders that occupy small circuit areas(More)