María Luisa López Vallejo

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This paper presents a methodology for hardware-software co-design. It is based on the formal description technique LOTOS in the specification phase, and on estimation methods at different levels of abstraction in the partitioning phase. The LOTOS specification describes the system as a set of interacting communicating processes. Our HW-SW partitioning(More)
This brief presents a novel 4096-point radix-4 memory-based FFT. The proposed architecture follows a conflictfree strategy that only requires a total memory of size N and few additional multiplexers. The control is also simple, as it is generated directly from the bits of a counter. Apart from the low complexity, the FFT has been implemented on a Virtex 5(More)
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