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We present the design of a self-routing quantum packet switch which improves on a previous design given by the authors [1]. Like the earlier design, this switch too routes packets represented by quantum bits (qubits) but it reduces the routing overhead per packet from O(logN) qubits to O(1) qubits by eliminating the need for an extra “dummy” inputoutput… (More)

We present the design of a self-routing quantum packet switch that exploits quantum parallelism to route all the input packets of an internally blocking self-routing network to its outputs. The packets are represented using quantum bits (qubits) and the quantum self-routing switch creates a superposition of all the maximum size non-blocking subsets of the… (More)

- Rahul Ratan, Manish Kumar Shukla, A. Yavuz Oruç
- 2007 41st Annual Conference on Information…
- 2007

Flexible distribution of data in the form of quantum bits (qubits) amongst spatially separated entities is an essential component of envisioned scalable quantum computing architectures. Since qubits cannot be copied, this operation of moving qubits can be relatively costly in terms of resources. Moreover, implementation of quantum gates requires precise and… (More)

- Manish Kumar Shukla, A. Yavuz Oruç
- IEEE Trans. Computers
- 2010

- Rahul Ratan, Manish Shukla
- 2002

Title of Thesis: ON ROUTING AND PERFORMANCE EVALUATION OF BUFFERED SPARSE CROSSBAR CONCENTRATORS Degree candidate: Rahul Ratan Degree and year: Master of Science, 2002 Thesis directed by: Professor A. Yavuz Oruç Department of Electrical and Computer Engineering We investigate the routing and performance of sparse crossbar packet concentrators under a… (More)

- Manish Kumar Shukla, P. C. Mishra
- Journal of Chemical Information and Computer…
- 1998

- Manish Kumar Shukla, Santanu K. Mishra, Anil Kumar, P. C. Mishra
- Journal of Computational Chemistry
- 2000

- Manish Kumar Shukla, A. Yavuz Oruç
- 2007 41st Annual Conference on Information…
- 2007

Recently, Tang et. al. introduced an algorithm called the programmable graph architecture (PGA) algorithm for multiplying matrices in GL(n,mu), the generalized linear group of matrices modulo mu, where mu is an integer, using its Cayley graph representation. The problem of multiplying matrices in GL(n,mu) is mapped to the problem of finding routes on a… (More)

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