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This work introduces a universal Quantum-Dot Cellular Automata logic gate (UQCALG) for synthesizing symmetric functions with the target to reduce wire crossings in a design as well as the number of operating clock cycles. It is realized with the coupled majority-minority gate (CMVMIN) structure. The proposed UQCALG structure not only improves performance of(More)
The data coherence in the cache systems of CMPs with thousands of processors are to be more accurate and reliable. This work proposes an effective solution to address this issue through introduction of highly efficient test logic with the cache controller. It is based on the modular structure of Cellular Automata (CA) and a special class of CA referred to(More)
This work reports a high speed protocol verificaion logic for Chip Multiprocessors (CMPs) realizing directory based cache coherence system. A special class of cellular automata (CA) referred to as single length cycle 2-attractor CA (TACA), has been introduced to identify the inconsistencies in cache line states of processors private caches. The introduction(More)