Mahdieh Grailoo

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Transistor sizing is very important for determination of the circuit performance. As a result for providing fair evaluation, an optimal size of transistor is necessary. Genetic algorithm that is capable of reduction of search problem complexity uses the transistor sizing which is originally a kind of search problem in the large multidimensional search space(More)
In this paper, we present two energy-efficient full adders (FAs) which are a crucial building block of nano arithmetic logic units (nano-ALUs) with the Cell Design Methodology (CDM). Since the most suitable design configuration for CNT-based ICs is pass transistor configuration (PTL), CDM which properly benefits from PTL advantages is utilized. So the(More)
Owning to rapid growth in standard-cell-based synthesized designs; the efficiency of standard cells has increasingly become important. In this line, the Cell Design Methodology (CDM) has systematically meditated to present some new efficient designs such as three 2-input XORs and full adder in hybrid CMOS logic style which are the most significant and(More)
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