• Publications
  • Influence
Simple, fast, and practical non-blocking and blocking concurrent queue algorithms
TLDR
Experiments on a 12-node SGI Challenge multiprocessor indicate that the new non-blocking queue consistently outperforms the best known alternatives; it is the clear algorithm of choice for machines that provide a universal atomic primitive (e.g., compare_and_swap or load_linked/store_conditional). Expand
Hazard pointers: safe memory reclamation for lock-free objects
  • Maged M. Michael
  • Computer Science
  • IEEE Transactions on Parallel and Distributed…
  • 1 June 2004
TLDR
Hazard pointers is presented, a memory management methodology that allows memory reclamation for arbitrary reuse and offers a lock-free solution for the ABA problem using only practical single-word instructions and guaranteeing continuous progress and availability, even in the presence of thread failures and arbitrary delays. Expand
High performance dynamic lock-free hash tables and list-based sets
TLDR
The experimental results show that the new algorithm outperforms the best known lock-free as well as lock-based hash table implementations by significant margins, and indicate that it is the algorithm of choice for implementing shared hash tables. Expand
Evaluation of Blue Gene/Q hardware support for transactional memories
TLDR
An extensive evaluation of the STAMP benchmarks on BG/Q is the first of its kind in understanding characteristics of running coarse-grained TM workloads on HTMs and reveals several interesting insights on the overhead and the scalability of BG/ Q HTM with respect to sequential execution, coarse-grain locking, and software TM. Expand
Nonblocking Algorithms and Preemption-Safe Locking on Multiprogrammed Shared Memory Multiprocessors
TLDR
The results indicate that the nonblocking queue consistently outperforms the best known alternatives and that data-structure-specific nonblocking algorithms, which exist for queues, stacks, and counters, can work extremely well. Expand
RingSTM: scalable transactions with a single atomic instruction
TLDR
The RingSTM system is the first STM that is inherently livelock-free and privatization-safe while at the same time permitting parallel writeback by concurrent disjoint transactions. Expand
Scalable lock-free dynamic memory allocation
TLDR
This paper presents a completely lock-free memory allocator that uses only widely-available operating system support and hardware atomic instructions, and is immune to deadlock regardless of scheduling policies, and hence can be used even in interrupt handlers and real-time applications without requiring special scheduler support. Expand
Quantitative comparison of Hardware Transactional Memory for Blue Gene/Q, zEnterprise EC12, Intel Core, and POWER8
TLDR
There is no single HTM system that is more scalable than the others in all of the benchmarks, there are measurable performance differences among the HTM systems in some benchmarks, and eachHTM system has its own implementation characteristics that limit its scalability. Expand
Robust architectural support for transactional memory in the power architecture
TLDR
Architectural support for transactional memory added to a future version of the Power ISA™ is described, including some previously unexplored interactions between TM and existing features of the ISA, and the motivation and rationale for the choices of architectural semantics are discussed. Expand
Safe memory reclamation for dynamic lock-free objects using atomic reads and writes
TLDR
This paper presents the firstLock-free memory management method for dynamic lock-free objects that allows arbitrary memory reuse, and does not require special operating system or hardware support, and guarantees an upper bound on the number of removed nodes not yet freed at any time. Expand
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