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Characterization of surface channel CCD image arrays at low light levels
The characterization of surface channel charge-coupled device line imagers with front-surface imaging, interline transfer, and 2-phase stepped oxide, silicon-gate CCD registers is presented. The
Theory and application of charge pumping for the characterization of Si-SiO/sub 2/ interface and near-interface oxide traps
A generalized charge pumping model has been developed which extends the use of charge pumping from a study of traps at the Si-SiO/sub 2/ interface to a study of traps in the oxide. The analytical
On the go with SONOS
Advancements in scaling gate insulators for MOS transistors permit low-voltage, silicon-oxide-nitride-silicon (SONOS) nonvolatile semiconductor memories (NVSMs) for a wide range of applications. The
Observation of near-interface oxide traps with the charge-pumping technique
In studies of MOS devices with the charge pumping technique, the authors have encountered a low-frequency increase in the charge recombined per cycle, which they attribute to the charging and
A CMOS-integrated 'ISFET-operational amplifier' chemical sensor employing differential sensing
The ISFET (ion-sensitive field-effect transistor) pH sensor is first matched with a MOSFET at the differential input stage of a CMOS operational amplifier (called the ISFET-operational amplifier) to
An analytical retention model for SONOS nonvolatile memory devices in the excess electron state
  • Yu Wang, M. White
  • Engineering, Physics
    International Semiconductor Device Research…
  • 10 December 2003
For the first time, we present a SONOS retention model that incorporates both T-B and TE detrapping mechanisms. First, the influences of gate dielectric thickness, temperature and trap energy on the
1.1 kV 4H-SiC power UMOSFETs
Silicon Carbide (4H-SiC), power UMOSFETs were fabricated and characterized from room temperature to 200/spl deg/C. The devices had a 12-/spl mu/m thick lightly doped n-type drift layer, and a nominal
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