• Publications
  • Influence
The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs
TLDR
The Raw microprocessor research prototype uses a scalable instruction set architecture to attack the emerging wire-delay problem by providing a parallel, software interface to the gate, wire and pin resources of the chip. Expand
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Evaluation of the Raw microprocessor: an exposed-wire-delay architecture for ILP and streams
This paper evaluates the Raw microprocessor. Raw addresses the challenge of building a general-purpose architecture that performs well on a larger class of stream and embedded computing applicationsExpand
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Baring It All to Software: Raw Machines
TLDR
The most radical of the architectures that appear in this issue are Raw processors-highly parallel architectures with hundreds of very simple processors coupled to a small portion of the on-chip memory. Expand
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SD-VBS: The San Diego Vision Benchmark Suite
TLDR
In the era of multi-core, computer vision has emerged as an exciting application area which promises to continue to drive the demand for both more powerful and more energy efficient processors. Expand
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Conservation cores: reducing the energy of mature computations
TLDR
We present a toolchain for automatically synthesizing c-cores from application source code and demonstrate that they can significantly reduce energy consumption by up to 16.0x for functions and up to 2.1x for whole applications. Expand
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Is dark silicon useful? Harnessing the four horsemen of the coming dark silicon apocalypse
  • M. Taylor
  • Engineering, Computer Science
  • DAC Design Automation Conference
  • 3 June 2012
TLDR
In this paper, I discuss four key approaches - the four horsemen - that have emerged as top contenders for thriving in the dark silicon age. Expand
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Scalar operand networks: on-chip interconnect for ILP in partitioned architectures
TLDR
In search of scalability, recent microprocessor designs in industry and academia exhibit a trend towards distributed resources such as partitioned register files, banked caches, multiple independent compute pipelines and even multiple program counters. Expand
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A landscape of the new dark silicon design regime
The rise of dark silicon is driving a new class of architectural techniques that “spend” area to “buy” energy efficiency. In this talk I examine two new frameworks employed by computer architects toExpand
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Kremlin: rethinking and rebooting gprof for the multicore age
TLDR
This paper examines Kremlin, an automatic tool that, given a serial version of a program, will make recommendations to the user as to what regions (e.g. loops or functions) of the program to attack first. Expand
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CortexSuite: A synthetic brain benchmark suite
TLDR
We use the major lobes of the cerebral cortex as a model for the organization and classification of data processing algorithms. Expand
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