M. Holland | Semantic Scholar

Publications
Influence

Harnessing FPGAs for computer architecture education

M. Holland, James Harris, S. Hauck
Computer Science
Proceedings IEEE International Conference on…
1 June 2003

This paper presents the major steps in the FPGA implementation of a MIPS processor, a debugging tool which provides complete control and observability of the processor, and an assembler that can map any MIPS non-floating point instruction into this set of eight supported instructions.

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Totem : Domain-Specific Reconfigurable Logic

S. Hauck, Katherine Compton, Ken Eguro, M. Holland, Shawn Phillips, Akshay Sharma
Computer Science
2005

The lessons learned from the Totem Project are presented, including how best to create domain-specific architectures, how to instantiate that logic into silicon, and how to create CAD tools to support these architectures.

Automatic creation of domain-specific reconfigurable CPLDs for SOC

M. Holland, S. Hauck
Computer Science
International Conference on Field Programmable…
18 April 2005

This paper presents tools that automate the creation of domain-specific CPLDs for SoC, including an architecture generator for finding appropriate architectures and a layout generator for creating efficient layouts.

View on IEEE

Automatic Creation of Reconfigurable PALs/PLAs for SoC

M. Holland, S. Hauck
Computer Science
FPL
30 August 2004

Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurability, or even be used…

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Improving performance and robustness of domain-specific CPLDs

M. Holland, S. Hauck
Computer Science
FPGA '06
22 February 2006

This paper presents work on creating efficient CPLD architectures for SoC, including the creation of sparse crossbars, and a novel switch smoothing algorithm which makes the crossbars amenable to layout, and addresses the question of how best to add resources to a C PLD in order to support future, unknown circuits.

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Domain-Specific Reconfigurable PAL / PLA Creation for SoC

M. Holland, S. Hauck
Computer Science
2006

This paper presents tools that automate the creation of domain specific PLAs and PALs for SoC, including an Architecture Generator for making optimized arrays and a Layout Generator for creating efficient layouts, and automating the generation process.