• Publications
  • Influence
MiBench: A free, commercially representative embedded benchmark suite
This paper examines a set of commercially representative embedded programs and compares them to an existing benchmark suite, SPEC2000. A new version of SimpleScalar that has been adapted to the ARMExpand
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Gate sizing using incremental parameterized statistical timing analysis
As technology scales into the sub-90 nm domain, manufacturing variations become an increasingly significant portion of circuit delay. As a result, delays must be modeled as statistical distributionsExpand
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A mixed-signal sensor interface microinstrument
Abstract A single-chip implementation of a microinstrumentation system is presented. The chip incorporates voltage, current, and capacitive sensor interfaces; a temperature sensor; a 10-channel,Expand
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OpenRAM: An open-source memory compiler
Computer systems research is often inhibited by the availability of memory designs. Existing Process Design Kits (PDKs) frequently lack memory compilers, while expensive commercial solutions onlyExpand
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Revisiting automated physical synthesis of high-performance clock networks
High-performance clock distribution has been a challenge for nearly three decades. During this time, clock synthesis tools and algorithms have strove to address a myriad of important issues helpingExpand
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Clock buffer and wire sizing using sequential programming
This paper investigates methods for clock skew minimization using buffer and wire sizing. First, a technique that significantly improves solution quality and stability of sequential programming-basedExpand
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Distributed LC resonant clock tree synthesis
  • Matthew R. Guthaus
  • Computer Science
  • IEEE International Symposium of Circuits and…
  • 15 May 2011
Clock networks in high-performance designs are extremely power hungry. One potential method for reducing the power consumption is to use distributed LC tanks in which energy is conserved by shiftingExpand
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Non-uniform clock mesh optimization with linear programming buffer insertion
Clock meshes are extremely effective at filtering clock skew from environmental and process variations. For this reason, clock meshes are used in most high performance designs. However, thisExpand
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Distributed LC Resonant Clock Grid Synthesis
Clock distribution networks can consume 35-70% of total chip power in high-performance designs. Resonant clocks can potentially reduce this power by recycling the energy using on-chip inductors. WeExpand
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Distributed resonant clock grid synthesis (ROCKS)
Clock distribution networks can consume 35–70% of total chip power in high-performance designs [13]. Resonant clocks can potentially reduce this power by recycling the energy using on-chip inductors.Expand
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