• Publications
  • Influence
A Designer's Guide to Asynchronous VLSI
TLDR
Bypass the limitations of synchronous design and create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design. Expand
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High performance asynchronous design using single-track full-buffer standard cells
TLDR
This paper presents a high-performance asynchronous template, single-track full-buffer (STFB), which achieves close to full-custom performance using a standard cell design flow and industry standard CAD tools. Expand
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Single-track asynchronous pipeline templates using 1-of-N encoding
TLDR
This paper presents a new fast and templatized family of fine-grain asynchronous pipeline stages based on the single-track protocol that can run at 1.6 GHz using MOSIS TSMC. Expand
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Low swing signaling using a dynamic diode-connected driver
TLDR
We propose a novel low swing driver using a Dynamic Diode-Connected Driver (DDCD) architecture. Expand
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A parallel pipelined implementation of LOCO-I for JPEG-LS
TLDR
We describe N2C-EX/sup 1/, a parallel, pipelined version of a modified LOCO-I lossless compression algorithm used within the JPEG-LS coding scheme. Expand
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High performance asynchronous ASIC back-end design flow using single-track full-buffer standard cells
TLDR
This work presents a back-end design flow for high performance asynchronous ASICs using single-track full-buffer (STFB) standard cells and industry standard CAD tools to perform schematic capture, simulation, layout, placement and routing. Expand
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A Parallel Architecture for the 2-D Discrete Wavelet Transform with Integer Lifting Scheme
TLDR
In this paper we propose a dedicated architecture to implement a 2-D discrete wavelet transform computed by adopting the new lifting scheme framework. Expand
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SINGLE-TRACK ASYNCHRONOUS PIPELINE TEMPLATE
DEDICATION To my wife. iii ACKNOWLEDGMENTS This work would not be possible without the vision and knowledge of my advisor, Peter A. Beerel. His support and guidance were essential for the developmentExpand
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Pyramidal Architectures for Computer Vision
TLDR
Explains how to deal with the vast quantity of data required for computer vision by starting with a low spatial resolution (and therefore a small amount of data) and proceeding through successive refinements to the final verification of the results at the highest resolution. Expand
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A compact wavelet index for retrieval in image database
TLDR
In this paper, we present an algorithm to build an index for image retrieval that heavily exploits the wavelet multi-resolution decomposition. Expand
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