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New all digital-transistor CMOS very high DC-gain amplifiers that use internal positive-feedback technique are presented. These structures don't require perfect matching of transistors to achieve the very high DC gain, and have a very low gain sensitivity to output swing. An implementation of a sample and hold circuit constructed using one of the proposed(More)
CMOS continuous-time and switched-capacitor filters which operate at high frequencies with high Quality factor Q are difficult to realize. The finite gain and the finite bandwidth of the integrator amplifiers are the main limitation. This paper describes two techniques to simultaneously increase bandwidth, transconductance, and DC-gain of an amplifier(More)
Several new CMOS very high DC-gain amplifiers that use internal positive-feedback techniques are presented. These amplifiers have a controllable gain and don't require perfect matching of transistors to achieve the high DC gain. An implementation of a sample and hold circuit constructed using one of the proposed amplifiers is described. Sin~ulation results(More)
 A high frequency fourth order CMOS continuous time Band-pass filter with programmable bandwidth and center frequency is presented in this paper. Simulations show That center frequency can be tuned from 141MHz to 603MHz for a 1.2pF capacitive load. This filter has been designed in TSMC 0.25u digital process with 2.5V power supply. The filter consumes(More)
— A design technique for rail-to-rail operational amplifiers is presented. The technique adds dummy pairs to sense the common mode range of the input differential pair and adjusts the output current accordingly. An amplifier built in the TSMC 0.25μ process shows a DC gain of approximately 84dB. The amplifier provides high gain for a wider range of output(More)
CMOS continuous-time and switched-capacitor filters which operate at high frequencies with high Quality factor Q are difficult to realize. The finite gain and tlie fulite bandwidth of the integrator amplifiers are the main limitation. This paper describes two techniques to siniultaneously increase bandwidth. transconductance. and DC-gain of an amplifier(More)
A 9hit, 1.8V, 165MSis pipelined ADC was built in a 0. 2 1 ~ CMOS digital process. The inter-stage amplifier in this converter was built using all digital transistors. To get sufficient gain with digital transistors a self-adjusting positive feedback operational amplifier that shows low sensitivity to output swing was used. The ADC consumed a total power of(More)
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