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This paper presents a functional abstracter for CMOS VLSI. A gate-level description is detived from a transistor-level description of the circuit and the logic equations are then expressed in behavioura! VHDL. This tools doesn't use any ceil library and much of this paper describes the models used and implemented in DESB. 1 Introduction Methods for(More)
Applications and products currently available for the broadcasting market are vertically integrated or proprietary. They are based on components requiring specific and costly development to interoperate and do rely typically on a single manufacturer or system integrator. Hence they are not fully compliant with broadcasters' requirements. ASSET is a European(More)
a timing analyzer, an interactive generator debugger, full-custom generators, and a test coverage tool. Ongoing researches are also experienced in the design methodology management domain. The authors would like to thank all the teachers, permanent researchers, and students more or less involved in the building of the ALLIANCE CAD system. Special thanks are(More)
To design and develop an Architectural Solution for Services Enhancing digital Television is the goal of the ASSET project. Porch Digital International, SHS Multimedia) to create a universal and unified system architecture that shall greatly improve interoperability in broadcasting environments. The implementation of this solution will indeed make(More)
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