M. Czernohorsky

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The hot electron induced mechanism disturbing the stored information in inhibited bit lines during the programming of nonvolatile memories with NAND architecture is studied in detail using a new dedicated advanced physical simulation scheme for the first time.
Random Telegraph Noise (RTN) characterization was performed on charge-trap-based TANOS memory cells. The analysis results of cycle stress dependence and cell size scaling are discussed based on single cell measurements. Comparing charge-trap and floating-gate memory technologies different behavior for RTN was obtained. On charge-trap cells a threshold(More)
On TANOS (Tantalum Alumina Nitride Oxide Silicon) charge trap cells an anomalous effect is observed during cell erase operation. Different TANOS cell architectures are investigated including an encapsulation liner of different thickness. Especially on cells fabricated without such a liner an unintended programming is observed and characterized in detail. A(More)
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