M. Chavarrias

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To compare the effects of 8 weeks of high-resistance circuit (HRC) training (3-6 sets of 6 exercises, 6 repetition maximum [RM], ∼35-second interset recovery) and traditional strength (TS) training (3-6 sets of 6 exercises, 6RM, 3-minute interset recovery) on physical performance parameters and body composition, 33 healthy men were randomly assigned to HRC,(More)
The Open RVC CAL compiler infrastructure allows the definition and simulation of complex algorithms as a set of interconnected dataflow actors using the RVC-CAL actor language as well as the automatic generation of C code for a number of target processors, like ARM or x86 based cores. Though code for multicore processors may also be generated, mapping among(More)
During the last decades, new video compression standards arose every few years with always higher compression gains and considerable increases on the computational cost. Single core processors have reached their limit and multicore processors are there to overcome this issue to give more processing power. In order to accelerate the implementation of new(More)
New multimedia portable devices support increasing spatial and temporal video resolutions as well as new and more efficient video codecs. This scenario leads to the use of multicore chips in order to comply with the higher computational loads. In a context dominated by the time to market pressure, the programming of multicore chips is a challenge. In this(More)
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