M. Benmansour

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A small area PHY transceiver that is compatible with CE16G-LR, CE16G-SR, SAS-6G, PCle and XAUl standards is demonstrated. The 4-channel transceiver is realized in a 90 nm CMOS process with each channel occupying a die area of 0.325 mm<sup>2</sup>. Power dissipation per channel is less than 230 mW from a 1V supply for 6.25 Gb/s, and scales for data rates(More)
This paper discusses the design of a low noise amplifier tunable over a wide range of frequencies. The LNA is designed for a frequency band 1.4 GHz-2 GHz and provides an output return loss, S22, less than -24 dB, an input return loss, S11, less than -10 dB, a gain of 11.5 dB and noise figure between 1.8-3.4 dB. The LNA has been implemented in 0.25 /spl mu/m(More)
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