M. Barbini

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The design and implementation of an input/output processor for an ATM switch are described. This IC was realized on a 0.7 /spl mu/m BiCMOS technology. To manipulate ATM cells at a frequency of 311 MHz (STM16) at the I/O of the chip, ECL blocks were employed. The core of the chip is composed of CMOS cells that run at a maximum clock speed of 65 MHz. Pure(More)
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