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- Arash Reyhani-Masoleh, M. Anwar Hasan
- IEEE Trans. Computers
- 2004

Representing the field elements with respect to the polynomial (or standard) basis, we consider bit parallel architectures for multiplication over the finite field GF ð2Þ. In this effect, first we derive a new formulation for polynomial basis multiplication in terms of the reductionmatrixQ. The main advantage of this new formulation is that it can be used… (More)

- Bijan Ansari, M. Anwar Hasan
- IEEE Trans. Computers
- 2008

A high performance architecture of elliptic curve scalar multiplication over finite field GF (2) is proposed. A pseudo-pipelined word serial finite field multiplier with word size w, suitable for the scalar multiplication is also developed. Implemented in hardware, this system performs a scalar multiplication in approximately 6⌈m/w⌉(m − 1) clock cycles and… (More)

- Haining Fan, M. Anwar Hasan
- IEEE Trans. Computers
- 2007

Based on Toeplitz matrix-vector products and coordinate transformation techniques, we present a new scheme for subquadratic space complexity parallel multiplication in GF ð2Þ using the shifted polynomial basis. Both the space complexity and the asymptotic gate delay of the proposed multiplier are better than those of the best existing subquadratic space… (More)

- Arash Reyhani-Masoleh, M. Anwar Hasan
- IEEE Trans. Computers
- 2002

ÐThe Massey-Omura multiplier of GF
2m uses a normal basis and its bit parallel version is usually implemented using m identical combinational logic blocks whose inputs are cyclically shifted from one another. In the past, it was shown that, for a class of finite fields defined by irreducible all-one polynomials, the parallel Massey-Omura multiplier had… (More)

- Jonathan Lutz, M. Anwar Hasan
- International Conference on Information…
- 2004

A high performance elliptic curve coprocessor is developed, which is optimized for a binary field recommended by NIST. The architecture uses a field multiplier capable of performing a field multiplication over the extension field with degree 163 in 0.060 /spl mu/sec. The coprocessor uses Lopez and Dahab's projective coordinate system and is optimized… (More)

- Huapeng Wu, M. Anwar Hasan, Ian F. Blake, Shuhong Gao
- IEEE Trans. Computers
- 2002

This article presents simple and highly regular architectures for finite field multipliers using a redundant representation. The basic idea is to embed a finite field into a cyclotomic ring which has a basis with the elegant multiplicative structure of a cyclic group. One important feature of our architectures is that they provide area-time trade-offs which… (More)

- Arash Reyhani-Masoleh, M. Anwar Hasan
- IEEE Trans. Computers
- 2005

For efficient hardware implementation of finite field arithmetic units, the use of a normal basis is advantageous. In this paper, two classes of architectures for multipliers over the finite field GF ð2Þ are proposed. These multipliers are of sequential type, i.e., after receiving the coordinates of the two input field elements, they go through k, 1 k m,… (More)

- Arash Reyhani-Masoleh, M. Anwar Hasan
- IEEE Trans. Computers
- 2006

In many cryptographic schemes, the most time consuming basic arithmetic operation is the finite field multiplication and its hardware implementation for bit parallel operation may require millions of logic gates. Some of these gates may become faulty in the field due to natural causes or malicious attacks, which may lead to the generation of erroneous… (More)

- Arash Reyhani-Masoleh, M. Anwar Hasan
- IEEE Trans. Computers
- 2001

For cryptographic applications, normal bases have received considerable attention, especially for hardware implementation. In this article, we consider fast software algorithms for normal basis multiplication over the extended binary field GFð2Þ. We present a vector-level algorithm which essentially eliminates the bit-wise inner products needed in the… (More)

- M. Anwar Hasan
- IEEE Symposium on Computer Arithmetic
- 2001