Lukáš Nagy

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The paper addresses a top-down design flow of depletion-load digital inverter formed by monolithically integrated depletion-mode and enhancement-mode high electron mobility transistors (HEMTs) on common InAlN/GaN heterostructure grown on sapphire substrate. We describe the inverter design at transistor level using HSPICE models developed earlier. The(More)
This paper addresses a design and performance evaluation of a non-clocked comparator circuit intended to work in a wide temperature range with very low value of the power supply voltage. Due to low voltage swing, the input voltage range is set to be rail-to-rail. The target fabrication process is a standard twin-well 130 nm CMOS technology, with appropriate(More)
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