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This paper presents a fully configurable framework for analog integrated circuit design automation. The goal of this framework, named as UCAF, is to provide in a single environment several optimization heuristics, design methodologies and technology options in order to allow for the designer the possibility to perform a set of comparisons and selections(More)
This paper presents an automatic sizing methodology for CMOS operational amplifiers considering process parameter variations in submicron technologies. These circuits are very sensitive to process variations, which cause mismatch. The proposed methodology comprises simultaneous optimization of power dissipation, gate area and yield prediction, exploring(More)
The goal of this paper is to present a tool for automatic synthesis of analog basic integrated blocks using the genetic algorithm heuristic and an external electrical simulator. The methodology is based on the minimization of a cost function and a set of constraints in order to size individual transistors of a given circuit. The synthesis methodology is(More)
The goal of this paper is to analyze the gm/I D methodology for automatic sizing of analog integrated amplifiers. This methodology exploits the analytical gm/ID methodology, in which the inversion level of the transistors are free variables and gate width and length are defined in terms of the technology independent gm/ID versus ID/(W/L) curve. Genetic(More)
Electronics submicrometrics devices present large systematic parameter variations related to imperfections during the fabrication process. These variations impact directly on the analog design, causing low reliability and increasing costs. This work presents a sensitivity analysis of parameter variation for a typical CMOS two-stage Miller operational(More)
This paper presents a digitally tunable 4th-order Gm-C low-pass filter (LPF) for multi-standards radio receivers. The cutoff frequency tuning is provided by changing the transconductance of a reconfigurable operational transconductance amplifier (OTA). Two control bits are employed to digitally control the OTA transconductance and also the power(More)
This paper presents a design constraints correlation analysis for an analog integrated circuit automatic sizing tool to synthesize the optimization process constraints. The specifications of an operation amplifier can be very correlated, making that a correlated pair force each other to a value even if one of them is not a constraint in the optimization(More)
This paper presents the design and characterization of fully differential amplifiers for application in an automatic circuit sizing tool. The tool uses Simulated Annealing as main optimization heuristic and electrical simulations for circuit specifications evaluations. The methodology is based on the minimization of a cost function and a set of constraints(More)