Luca Ramini

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Optical networks-on-chip (ONoCs) are currently still in the concept stage, and would benefit from explorative studies capable of bridging the gap between abstract analysis frameworks and the constraints and challenges posed by the physical layer. This paper aims to go beyond the traditional comparison of wavelength-routed ONoC topologies based only on their(More)
—The performance of future chip multi-processors will only scale with the number of integrated cores if there is a corresponding increase in memory access efficiency. The focus of this paper on a 3D-stacked wavelength-routed optical layer for high bandwidth and low latency processor-memory communication goes in this direction and complements ongoing efforts(More)
Optical Networks-on-Chip (ONoCs) are considered a promising way of improving power and bandwidth limitations in next generation multi- and many-core integrated systems. Today, most related research acknowledges the key role of the physical layer in assessing ONoC topologies (e.g., insertion loss), but overlooks the placement and routing stage in the design(More)
—Many crossbenchmarking results reported in the open literature raise optimistic expectations on the use of optical networks-on-chip (ONoCs) for high-performance and low-power on-chip communication. However, most of those previous works ultimately fail to make a compelling case for chip-level nanopho-tonic NoCs, especially for the lack of aggressive(More)
Although many valuable research works have investigated the properties of optical networks-on-chip (ONoCs), the vast majority of them lack an accurate exploration of the network interface architecture (NI) required to support optical communications on the silicon chip. The complexity of this architecture is especially critical for a specific kind of ONoCs:(More)
There is still a significant gap between the optical network-on-chip (NoC) concept and a mature interconnect technology with practical relevance. Current research aims at bridging this gap by evolving basic optical components and by developing ad-hoc design tools to enable their use for system-level design. This paper points out another cause for the design(More)
Optical Networks-on-Chip (ONoCs) are a promising technology to overcome the bottleneck of low bandwidth of electronic Networks-on-Chip. Recent research discusses power and performance benefits of ONoCs based on their system-level design, while layout effects are typically overlooked. As a consequence, laser power requirements are inaccurately computed from(More)
—Many crossbenchmarking results reported in the open literature provide optimistic expectations on the use of optical networks-on-chip (ONoCs) for high-performance and low-power on-chip communication in future manycore systems. The goal of this paper is to highlight key methodological steps for a realistic assessment of the emerging nanophotonic technology.(More)
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