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In this paper, we propose a novel simulation algorithm for large scale structured power grid networks. The new method formulates the traditional linear system as a special two-dimension Poisson equation and solves it using an analytical expressions based on FFT technique. The computation complexity of the new algorithm is <i>O</i>(<i>NlgN</i>), which is(More)
Early stage power estimation is critical for SoC architecture exploration and validation in modern VLSI design, but real-time, long time interval and accurate estimation is still challenging for system-level estimation and software/hardware tuning. This work proposes a model abstraction approach for real-time power estimation in the manner of machine(More)
Application specific on-chip network is a promising direction for networks on chips (NoCs) to solve the interconnection challenges that systems on chips (SoCs) will encounter in the billion-transistor age. This paper presents a novel design methodology named on-chip network evolution, which helps developing an on-chip network rapidly according to a specific(More)
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