Liuxi Yang

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The progressive integration of processor and memory has unexpected implications for the design of DSM systems. To exploit this integration best, we claim that we need to redesign the nodes of DSM systems and then reorganize the whole machine. In this paper, we propose a new DSM organization where processor nodes have their on-chip memories conngured as(More)
With the increasing gap between processor speed and memory speed, a sophisticated memory hierarchy is key to high performance. However, the operating system tends to use the memory hierarchy poorly. This thesis presents a comprehensive characterization and optimization of the performance of multiprocessor memory hierarchies for operating systems. The(More)
Optimizing on-chip primary data caches for parallel scien-tiic applications is challenging because diierent applications exhibit diierent behavior. Indeed, while some applications exhibit good spatial locality, others have accesses with long strides that prevent the eeective use of cache lines. Finally, other applications cannot exploit long lines because(More)
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