Learn More
—The influence of the architecture on analog-to-digital converter modeling is investigated for the three most widespread architectures: integrating, successive approximations, and flash. The effects of main error sources are analyzed in terms of integral and differential nonlinearity with the aim of setting up a unified error model. Such a model is useful(More)
—Testing of ADC differential nonlinearity by the his-togram method requires a signal generator with extremely low distortion and high stability. In this paper, the new type of stimulus signal is proposed, which simplifies the task. The testing signal has an exponential form and can be generated simply by discharging the capacitor across the resistance. The(More)
Improvements in technology, increasing in resolution and various correction techniques of analogue-to-digital converters (ADC) makes linearity testing of ADC difficult and time-consuming task. New methods and approaches are examined. Statical and histogram tests require long time measurement and huge amount of data to be analysed. This paper deals with(More)
Digital post processing of output data is often used to enhance the ADC Effective Number Of Bits (ENOB). In particular, it can be used to partially recover ENOB restrictions caused by nonlinearities. The paper deals with advantages and disadvantages coming from the application of a proposed nonlinearity correction method based on the Bayes theorem. It(More)
− The paper presents a remote laboratory system that allows performing experiments controlled across the Internet via web interface as well as locally in the classroom. The system has been developed for courses of advanced digital design and signal processing using complex Field Programmable Gate Array (FPGA) platforms. It allows students full access to(More)