Lieyi Fang

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A 9hit, 1.8V, 165MSis pipelined ADC was built in a 0. 2 1 ~ CMOS digital process. The inter-stage amplifier in this converter was built using all digital transistors. To get sufficient gain with digital transistors a self-adjusting positive feedback operational amplifier that shows low sensitivity to output swing was used. The ADC consumed a total power of(More)
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