Learn More
Given a behavioral description of a DSP algorithm represented by a data-flow graph, we show how to obtain a rate-optimal static schedule with the minimum unfolding factor under two models, integral grid model and fractional grid model, and two kinds of implementations for each model, pipelined implementation and non-pipelined implementation. We present a(More)
—Loop scheduling is an important problem in parallel processing. The retiming technique reorganizes an iteration; the unfolding technique schedules several iterations together. We combine these two techniques to obtain a static schedule with a reduced average computation time per iteration. We first prove that the order of retiming and unfolding is(More)
This paper presents a novel approach to synthesize low power FSMs using non-uniform code length. Switching activity is reduced by decreasing the expected number of state bits switched less than [log |S|] The state set S of the FSM is decomposed into two sets based on the limit state probabilities. The state set with very high probability is encoded with(More)
— We consider the resource-constrained scheduling of loops with inter-iteration dependencies. A loop is modeled as a data flow graph (DFG), where edges are labeled with the number oj iterations between dependencies. We design a novel and ji'exible technique, called rotation scheduling, for scheduling cyclic DFGs using loop pipelining. The rotation technique(More)
This paper presents a novel optimization technique for the design of application specific integrated circuits dedicated to perform iterative or recursive time-critical sections of multi-dimensional problems, such as image processing applications. These sections are modeled as cyclic multi-dimensional data flow graphs (MDFGs). This new technique, called(More)