Liang-Chia Cheng

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Power integrity is generally considered to be one of the major bottlenecks hindering the prevalence of three-dimensional integrated circuits (3D ICs). The higher integration density and smaller footprint result in significantly increased power density, which threatens the system reliability. In view of this, there has been groundswell of interest in(More)
The power grid needs to be frequently analyzed during the design process of power distribution network. Hence, an effective method being able to capture its transient behavior is desired for designers. This work utilizes macro modeling techniques, sparse recovery mechanisms, a proposed pseudo-node value estimation method, and an adaptive error control(More)
Runtime noise management systems typically respond to on-chip noise sensors to accurately capture voltage emergencies. As such, the threshold voltage for noise sensors to report emergencies serves as a critical tuning knob between the system failure rate and the runtime performance loss (RPL) due to false alarms. Unfortunately, the problem of optimal(More)