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—In a parallel multiwire structure, the exact spacing and size of the wires determine both the resistance and the distribution of the capacitance between the ground plane and the adjacent signal carrying conductors, and have a direct effect on the delay. Using closed-form equations that map the geometry to the wire parasitics and empirical switch factor(More)
Because of the today's market demand for high-performance, high-density portable hand-held applications, electronic system design technology has shifted the focus from 2-D planar SoC single-chip solutions to different alternative options as tiled silicon and single-level embedded modules as well as 3-D integration. Among the various choices, finding an(More)
As technology scales down, the interconnect for on-chip global communication becomes the delay bottleneck. In order to provide well-controlled global wire delay and efficient global communication, a Network-on-Chip (NoC) architecture was proposed by different authors [Route packets, not wires: on-chip interconnection networks, in: Design connect different(More)
—Modeling parasitic parameters of Through-Silicon-Via (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circuits and interconnections in three-dimensional (3-D) Integrated Circuits (ICs). This paper presents a complete set of self-consistent equations including self and coupling terms for(More)
A multilevel dynamic interconnect model was derived for accurate a priori signal integrity estimates. Cross-talk and delay estimations over interconnects in deep sub-micron technology were analyzed systematically using this model. Good accuracy and excellent time-efficiency were found compared with electromagnetic simulations. We aim to build a dynamic(More)
  • Huimin She, Zhonghai Lu, Axel Jantsch, Li-Rong Zheng, Dian Zhou
  • 2007
Nowadays, the evolution of wireless communication and network technologies enables remote medical services to be available everywhere in the world. In this paper, a network-based system architecture adopting wireless personal area network (WPAN) protocol IEEE 802.15.4/Zigbee standard and 3G communication networks for remote medical applications is proposed.(More)
—Retransmission has been adopted as one of the most popular schemes for improving transmission reliability in wireless sensor networks. Many previous works have been done on reliable transmission issues in experimental ways, however, there still lack of analytical techniques to evaluate these solutions. Based on the traffic model, service model and energy(More)
As technology scales down, the interconnect for on-chip global communication becomes the delay bottleneck. In order to provide well-controlled global wire delay and efficient global communication, a Network-on-Chip (NoC) architecture was proposed by different authors [1][5][6]. NoC uses Interconnect Intellectual Property (IIP) to connect different(More)
Performance analysis is crucial for designing predictable and cost-efficient sensor networks. Based on the network calculus theory, we propose a flow-based traffic splitting strategy and its analytical method for worst-case performance analysis on cluster-mesh sensor networks. The traffic splitting strategy can be used to alleviate the problem of uneven(More)